1. Field of the Invention
The present invention relates to a semiconductor device, such as a semiconductor integrated circuit, and more particularly to a semiconductor device including a protective circuit for protecting internal circuits of the semiconductor substrate from an overcurrent, such as a surge current, and a guard ring to prevent the deterioration of the dielectric strength due to a leak current which occurs in relation to the protection circuit.
2. Prior Art
In a semiconductor integrated circuit having an integrated circuit fabricated in the semiconductor substrate, when an overvoltage caused by static electricity or the like is applied to the input pad of the internal circuits and, therefore, a surge current flows into the internal circuits connected to the input pad, the internal circuits are damaged.
To prevent the internal circuits from being damaged by a surge current, a bypass to inhibit an excessive surge current from being input into the internal circuits is formed by using a MOS transistor having a source and a drain formed in the semiconductor substrate.
This MOS transistor cuts off the bypass by blocking the channel between the source and the drain to an ordinary current, but makes the bypass conductible by establishing the channel to an excessive current, such as a surge current to thereby preventing the excessive current from flowing into the internal circuits.
With semiconductor devices having a MOS transistor just described as the protection circuit, if part of the carriers produced between the source and the drain of the MOS transistor flows to other circuit portions in the vicinity of the protection circuit, there is a possibility that the dielectric strength of the semiconductor device deteriorates.
To prevent the carriers which leak from the protection circuit formed of a MOS transistor from moving to the other circuit portions in the surrounding area of the protection circuit, a guard ring, including a well region which absorbs the carriers leaking from the protection circuit, is formed between the protection circuit and the other circuit portions in the vicinity of the protection circuit.
In the guard ring, when the substrate is of p-type conductivity, for example, the well region is formed by converting that region of the substrate to n-type conductivity, and the well region is connected through a heavy n+ doped region to the power supply line. When the semiconductor substrate is of p-type conductivity, an n-channel MOS transistor is used for the MOS transistor of the protection circuit.
By this guard ring, the part of carriers produced between the source and the drain of the n-channel MOS transistor of the protection circuit are absorbed through the n-well region by the positive potential of the power supply applied to the heavily doped n+ region, so that the deterioration of the dielectric strength caused by the carriers can be prevented.
Meanwhile, in the guard ring of the prior art, the heavily doped n+ region in the well, the p-type semiconductor substrate, and the drain, made of an n-type impurity region, of the MOS transistor constitute a parasitic NPN transistor as those regions respectively serve as the collector, the base, and the emitter.
In this parasitic transistor, when a voltage lower than the potential of the semiconductor substrate is applied to the input pad, the drain potential working as its emitter potential becomes higher than the substrate potential working as its base potential, with the result that the parasitic transistor conducts. Under the condition that this parasitic transistor is conducting, the other parasitic NPN transistors, which are outside the guard ring and equivalent to that parasitic transistor using the drain as its emitter, conduct.
The conduction of those parasitic transistors causes various problems in the circuit operation.
The object of the present invention is to provide a new technique to inhibit the conduction of the parasitic transistors of the semiconductor device, including a protection circuit to protect the internal circuits against an overcurrent, and a guard ring designed to prevent the deterioration of the dielectric strength by a leak current which occurs in conjunction with the protection circuit.